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| ICX267AK Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras Description The ICX267AK is a diagonal 8mm (Type 1/2) interline CCD solid-state image sensor with a square pixel array and 1.45M effective pixels. Progressive scan allows all pixels' signals to be output independently. Also, the adoption of high frame rate readout mode supports 30 frames per second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip is suitable for applications such as electronic still cameras, PC input cameras, etc. Features * Progressive scan allows individual readout of the image signals from all pixels. * High horizontal and vertical resolution (both approx. 800TV-lines) still image without a mechanical shutter. * Supports high frame rate readout mode (effective 512 lines output, 30 frames/s) * Square pixel * Horizontal drive frequency: 28.636MHz * No voltage adjustments (reset gate and substrate bias are not adjusted.) * R, G, B primary color mosaic filters on chip * High resolution, high color reproductivity, high sensitivity, low dark current * Low smear, excellent antiblooming characteristics * Continuous variable-speed shutter 20 pin DIP (Plastic) Pin 1 2 V 8 2 Pin 11 H 40 Optical black position (Top view) Device Structure * Interline CCD image sensor * Image size: Diagonal 8mm (Type 1/2) * Total number of pixels: 1434 (H) x 1050 (V) approx. 1.50M pixels * Number of effective pixels: 1392 (H) x 1040 (V) approx. 1.45M pixels * Number of active pixels: 1360 (H) x 1024 (V) approx. 1.40M pixels (7.959mm diagonal) * Chip size: 7.60mm (H) x 6.20mm (V) * Unit cell size: 4.65m (H) x 4.65m (V) * Optical black: Horizontal (H) direction: Front 2 pixels, rear 40 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels * Number of dummy bits: Horizontal 20 Vertical 3 * Substrate material: Silicon Wfine CCD is a registered trademark of Sony Corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E99947A33 ICX267AK Block Diagram and Pin Configuration (Top View) VOUT GND GND V2B V2A 2 ... V3 10 9 8 7 6 5 4 3 Vertical register ... ... ... V1 1 Note) NC NC NC Note) : Photo sensor Horizontal register 11 12 13 14 15 16 17 18 19 20 SUB VDD NC VL H1 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 Symbol V1 V2A V2B V3 NC NC GND NC GND VOUT GND Signal output GND Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol VDD GND SUB NC CSUB NC VL RG H1 H2 Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock Substrate bias1 GND Substrate clock Description Supply voltage 1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of 0.1F. CSUB GND -2- RG H2 NC ICX267AK Absolute Maximum Ratings Item VDD, VOUT, RG - SUB V2A, V2B - SUB Against SUB V1, V3, VL - SUB H1, H2, GND - SUB CSUB - SUB VDD, VOUT, RG, CSUB - GND Against GND V1, V2A, V2B, V3 - GND H1, H2 - GND Against VL V2A, V2B - VL V1, V3, H1, H2, GND - VL Ratings -40 to +10 -50 to +15 -50 to +0.3 -40 to +0.3 -25 to -0.3 to +18 -10 to +18 -10 to +15 -0.3 to +28 -0.3 to +15 to +15 -16 to +16 -16 to +16 -30 to +80 -10 to +60 Unit V V V V V V V V V V V V V C C 1 Remarks Voltage difference between vertical clock input pins Between input H1 - H2 clock pins H1, H2 - V3 Storage temperature Operating temperature 1 +24V (Max.) when clock width < 10s, clock duty factor < 0.1%. +16V (Max.) is guaranteed for turning on or off power supply. -3- ICX267AK Bias Conditions Item Power Supply voltage Protective transistor bias Substrate clock Reset gate clock Symbol VDD VL SUB RG Min. 14.55 Typ. 15.0 1 2 2 Max. 15.45 Unit V Remarks 1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. 2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Power supply current Symbol IDD Min. Typ. 7.7 Max. Unit mA Remarks Clock Voltage Conditions Item Readout clock voltage VVT VVH02A VVH1, VVH2A, VVH2B, VVH3 VVL1, VVL2A, VVL2B, VVL3 Vertical transfer clock voltage V1, V2A, V2B, V3 | VVL1 - VVL3 | VVHH VVHL VVLH VVLL Horizontal transfer clock voltage Reset gate clock voltage VH VHL VRG VRGLH - VRGLL VRGL - VRGLm Substrate clock voltage VSUB 22.15 23.0 4.75 -0.05 3.0 5.0 0 3.3 Symbol Min. 14.55 -0.05 -0.2 -8.4 7.6 Typ. 15.0 0 0 -8.0 8.0 Max. 15.45 0.05 0.05 -7.6 8.4 0.1 0.9 1.3 1.0 0.9 5.25 0.05 5.5 0.4 0.5 23.85 Unit V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 3 3 4 4 4 5 Low-level coupling Low-level coupling High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL1 + VVL3)/2 VVH = VVH02A Remarks -4- ICX267AK Clock Equivalent Circuit Constant Item Symbol CV1 Capacitance between vertical transfer clock and CV2A GND CV2B CV3 CV12A, CV2B1 Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor V1 CV12A V2A Min. Typ. 2200 3300 3300 3300 1200 1200 2200 47 100 8 680 36 56 56 30 15 20 Max. Unit Remarks pF pF pF pF pF pF pF pF pF pF pF CV2A3, CV32B CV13 CH1, CH2 CHH CSUB R1 R2A, R3 R2B RGND RH RRG Capacitance between reset gate clock and GND CRG R1 R2A RH H1 CV1 CV2B1 CV2A CV2A3 CV13 CV2B R2B RGND CV3 R3 RH H2 CHH CH1 CH2 CV32B V2B V3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RRG RG CRG Reset gate clock equivalent circuit -5- ICX267AK Drive Clock Waveform Conditions (1) Readout clock waveform VT 100% 90% M VVT 10% 0% tr twh tf 0V M 2 Note) Readout clock is used by composing vertical transfer clocks V2A and V2B. (2) Vertical transfer clock waveform V1 VVHL VVH1 VVHH VVH VVLH VVL01 VVL1 VVLL VVL V2A, V2B VVH02A, VVH02B VVHH VVHL VVH2A, VVH2B VVH VVLH VVL2A, VVL2B VVLL VVL V3 VVHL VVH3 VVHH VVH VVL03 VVLL VVLH VVL VVH = VVH02A VVL = (VVL01 + VVL03)/2 VVL3 = VVL03 VV1 = VVH1 - VVL01 VV2A = VVH02A - VVL2A VV2B = VVH02B - VVL2B VV3 = VVH3 - VVL03 -6- ICX267AK (3) Horizontal transfer clock waveform tr H2 90% VCR VH VH 2 10% H1 two VHL twl twh tf Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two. (4) Reset gate clock waveform tr twh tf RG waveform VRGH twl VRG Point A VRGLH VRGLL VRGLm VRGL VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH - VRGL. Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform 100% 90% M VSUB 10% VSUB 0% (A bias generated within the CCD) M 2 tf tr twh -7- ICX267AK Clock Switching Characteristics Item Readout clock Vertical transfer clock Horizontal transfer clock Symbol VT V1, V2A, V2B, V3 H1 H2 twh twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 3.2 3.4 0.5 15 10 12.5 10 12.5 10 12.5 10 12.5 5 5 0.01 0.01 4 8 3.9 24 2 0.5 2 0.5 7.5 7.5 5 5 0.01 0.01 0.5 Unit s Remarks During readout 1 2 450 ns 7.5 7.5 ns During imaging During H1 parallel-serial H2 conversion RG SUB s ns s During drain charge Reset gate clock Substrate clock 1 When vertical transfer clock driver CXD1267AN x 2 is used. 2 tf tr - 2ns, and the cross-point voltage (VCR) for the H1 rising side of the H1 and H2 waveforms must be at least VH/2 [V]. Item Horizontal transfer clock Symbol H1, H2 two Min. 8 Typ. 10 Max. Unit Remarks ns Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics) 1.0 0.8 Relative Response 0.6 0.4 0.2 0 400 500 600 700 Wave Length [nm] 800 900 1000 -8- ICX267AK Image Sensor Characteristics Item G sensitivity Sensitivity comparison R B Symbol Sg Rr Rb Vsat Saturation signal Vsat2 Vsat4 Min. 320 0.4 0.3 450 380 380 Typ. 400 0.55 0.45 0.7 0.6 mV mV mV Max. Unit mV Measurement method 1 1 1 2 2 2 (Ta = 25C) Remarks 1/30s accumulation Progressive scan readout mode High frame rate Ta = 60C readout mode High frame rate readout two pixels addition1 Progressive scan readout, high frame rate readout two pixels addition High frame rate readout mode Zone 0 and I Zone 0 to I ' Smear Sm 0.001 0.002 0.0025 0.005 20 25 8 8 8 2 3.8 3.8 3.8 0.5 % % % % % % mV mV % % % % 3 3 4 4 5 5 6 7 8 8 8 9 Video signal shading SHg Srg Uniformity between video signal channels Sbg Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag Ydt Ydt Lcg Lcr Lcb Lag Ta = 60C, 15 frames/s Ta = 60C, 15 frames/s2 1 Vsat4 is the saturation signal amount at two pixels addition, and it is 190mV per one pixel. VSUB internal generation value ensures 190mV per one pixel of the saturation signal amount in high frame rate two pixels addition mode. 2 Eliminates the dark signal shading in the vertical direction by the high-speed transfer of the vertical register. -9- ICX267AK Zone Definition of Video Signal Shading 1392 (H) 16 16 8 H 8 V 10 H 8 1040 (V) Zone 0, I Zone II, II' V 10 8 Ignored region Effective pixel region Measurement System CCD signal output [A] Gr/Gb CCD C.D.S AMP S/H R/B S/H R/B channel signal output [C] Gr/Gb channel signal output [B] Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1. Image Sensor Characteristics Measurement Method Color coding and readout of this image sensor Gb R Gb R B Gr B Gr Gb R Gb R B Gr B Gr The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. Horizontal register Color Coding Diagram All pixel signals are output successively in a 1/15s period. The R signal and Gr signal lines and the Gb signal and B signal lines are output successively. - 10 - ICX267AK Readout modes The diagram below shows the output methods for the following three readout modes. Progressive scan mode High frame rate readout mode High frame rate readout two pixels addition mode 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) VOUT 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) VOUT VOUT 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) 1. Progressive scan mode In this mode, all pixels signals are output in non-interlace format in 1/15s. The vertical resolution is approximately 800 TV-lines and all pixels signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. 2. High frame rate readout mode All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th lines, 7th and 8th lines). The vertical resolution is approximately 400 TV-lines. This readout mode emphasizes processing speed over vertical resolution. 3. High frame rate readout two pixels addition mode All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th lines, 7th and 8th lines), and by reading out two out of the remaining four lines (1st and 2nd lines, 5th and 6th lines) after shifting the vertical register by 2 bits, and adding them in the vertical register. - 11 - ICX267AK Measurement conditions 1) In the following measurements, the device drive conditions are at the typical values of the progressive scan mode, bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system. Definition of standard imaging conditions 1) Standard imaging condition I : Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition I : Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G sensitivity, sensitivity comparison Set to standard imaging condition I After selecting the electronic shutter mode with a shutter speed of 1/100s, . measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screen, and substitute the values into the following formulas. VG = (VGr + VGb)/2 100 Sg = VG x [mV] 30 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to standard imaging condition I . After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to standard imaging condition I . With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Vsm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = Vsm / Gra + Gba + Ra + Ba x 1 x 1 x 100 [%] (1/10V method conversion value) 4 500 10 - 12 - ICX267AK 4. Video signal shading Set to standard imaging condition I . With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula. SHg = (Grmax - Grmin)/150 x 100 [%] 5. Uniformity between video signal channels After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of the R signal and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of the B signal, and substitute the values into the following formulas. Srg = (Rmax - Rmin)/150 x 100 [%] Sbg = (Bmax - Bmin)/150 x 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 8. Line crawl Set to standard imaging condition I . Adjusting the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G and B filters and measure the difference between G signal lines (Glr, Glg, Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = Gli x 100 [%] (i = r, g, b) Gai 9. Lag Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) x 100 [%] VD V2A Light Strobe light timing signal output 150mV Output Vlag (lag) - 13 - Drive Circuit 15V -8.0V 1 2 3 4 XV1 XV2A XSG1 5 6 7 8 9 10 CXD1267AN 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 100 2SK523 CCD OUT 3.9k 1 2 3 XSUB XV3 XV2B XSG2 4 5 6 7 8 9 10 22/20V H2 H1 RG CXD1267AN 20 19 18 17 16 15 14 13 12 11 1/35V 100k 20 19 18 17 16 15 14 13 12 11 H2 H1 RG VL NC CSUB NC SUB GND VDD V1 V2A V2B V3 NC NC GND NC GND VOUT ICX267 (Bottom View) - 14 - 22/20V 22/16V 0.01 VR1 (1.3K) VSUB CONT. 0.1 1M 0.1 2200P 0.1 Note) Substrate bias control 1. Connect the ground resistor (VR1) shown below to the CSUB pin by each readout mode in order to secure the saturation signal described on the image sensor characteristics. Progressive scan readout mode : 2.0k High frame rate readout mode : 3.8k High frame rate 2 pixels addition mode: Ground resistor should not be connected. 2. If the substrate bias control signal is set to high level, and the ground resistor (VR1) connected to CSUB pin is not grounded at 55ms before the exposure time starts because tf is late, the internal generation voltage (VSUB) may not fall enough.Substrate bias adjustment control signal VSUB Cont. Substrate bias adjustment control signal VSUB Cont. Substrate bias SUB pin voltage GND tf 45ms tr 1ms Internal generation value VSUB (VSUB in high frame rate readout two pixels addition mode) ICX267AK Sensor Readout Clock Timing Chart Progressive Scan Mode Progressive Scan Mode (With high-speed sweep) XV1 XV2A/XV2B XV3 XSG1 XSG2 The sensor readout clocks XSG1 and XSG2 are added to each XV2A and XV2B. - 15 - HD 27.9s (800 bits) 69.5ns (2 bits) V1 3.49s (100 bits) V2A V2B V3 ICX267AK Sensor Readout Clock Timing Chart High Frame Rate Readout Mode XV1 XV2A/XV2B XV3 XSG1 XSG2 The sensor readout clock XSG2 is added to XV2B. - 16 - HD 27.9s (800 bits) 69.5ns (2 bits) 5.86s (168 bits) V1 3.49s (100 bits) V2A V2B V3 ICX267AK Sensor Readout Clock Timing Chart High Frame Rate Readout Two Pixels Addition Mode XV1 XV2A/XV2B XV3 XSG1 XSG2 17.15s (492 bits) The sensor readout clocks XSG1 and XSG2 are added to each XV2A and XV2B. - 17 - HD 27.9s (800 bits) 69.5ns (2 bits) 3.49s (100 bits) 5.86s (168 bits) V1 V2A V2B V3 ICX267AK 2 98 28 28 28 28 28 28 28 28 28 28 28 28 28 28 2 98 Drive Timing Chart (Vertical Sync) Progressive Scan Mode VD 1063 1068 1044 1052 1063 10 11 12 13 21 HD 1068 1 3 2 5 4 7 6 8 9 V1 V2A V2B V3 1040 CCD OUT 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 10 1038 1039 1040 1 - 18 - 1234567812345 ICX267AK Drive Timing Chart (Vertical Sync) 3 4 7 8 3 4 7 8 11 12 15 16 High Frame Rate Readout Mode 1035 1036 1039 1040 3 4 7 8 3 4 7 8 11 12 15 16 1035 1036 1039 1040 3 4 7 8 3 4 7 8 11 12 15 16 - 19 - V2B V2A V3 V1 CCD OUT HD VD 531 532 533 534 1 2 3 4 5 6 7 8 523 524 525 526 527 528 529 530 531 532 533 534 1 2 3 4 5 6 7 8 523 524 525 526 527 528 529 530 531 532 533 534 1 2 3 4 5 6 7 8 1/30s 1/30s ICX267AK Drive Timing Chart (Vertical Sync) 1 2 5 6 1 2 5 6 9 10 13 14 3 4 7 8 3 4 7 8 11 12 15 16 1033 1034 1037 1038 1035 1036 1039 1040 1 2 5 6 1 2 5 6 9 10 13 14 3 4 7 8 3 4 7 8 11 12 15 16 1033 1034 1037 1038 1035 1036 1039 1040 1 2 5 6 1 2 5 6 9 10 13 14 3 4 7 8 3 4 7 8 11 12 15 16 - 20 - V3 V1 CCD OUT HD VD V2B 531 532 533 534 1 2 3 4 5 6 7 8 V2A 1/30s 523 524 525 526 527 528 529 530 531 532 533 534 1 2 3 4 5 6 7 8 High Frame Rate Readout Two Pixels Addition Mode 1/30s 523 524 525 526 527 528 529 530 531 532 533 534 1 2 3 4 5 6 7 8 ICX267AK Drive Timing Chart (Vertical Sync) Progressive Scan Mode (With high-speed sweep) HD 1 1790 1 16 56 96 412 392 2 430 CLK H1 H2 - 21 - V1 1 1 56 1 1 56 1 1 168 1 168 V2A 168 1 112 V2B 168 1 112 V3 112 1 1 56 112 1 36 SUB 1 188 1 RG ICX267AK Drive Timing Chart (Horizontal Sync) Progressive Scan Mode HD 1 1790 1 16 56 96 412 392 2 430 CLK H1 H2 1 V1 84 1 1 V2A 1 V2B 1 28 1 1 V3 56 84 84 1 1 SUB 1 188 84 112 1 36 28 1 84 1 84 1 1 84 84 1 28 1 84 84 1 84 1 56 1 84 1 1 84 56 - 22 - RG ICX267AK Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Mode HD 1 96 2 1790 1 412 CLK H1 H2 1 V1 1 V2A 1 V2B 1 28 1 1 V3 56 84 84 1 1 SUB 1 188 84 112 1 36 28 1 84 1 84 1 1 84 84 1 28 84 1 1 84 84 1 84 1 56 1 84 1 1 84 56 RG 16 56 392 430 - 23 - ICX267AK Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Two Pixels Addition Mode HD 1 96 2 1790 1 412 CLK H1 H2 1 V1 84 1 1 V2A 1 V2B 1 28 1 1 V3 56 84 84 1 1 SUB 1 188 84 112 1 36 28 1 84 1 84 1 1 84 84 1 28 1 84 84 1 84 1 56 1 84 1 1 84 56 RG 16 56 392 430 - 24 - ICX267AK Drive Timing Chart (Horizontal Sync) Progressive Scan Mode (With high-speed sweep) (Refer to "a" on page 21.) HD 1 96 2 1790 1 412 CLK H1 H2 V1 16 56 1 1 56 1 1 56 1 1 168 1 168 V2A 168 1 112 V2B 168 1 112 V3 112 1 1 56 112 1 36 SUB 1 188 1 RG 392 430 - 25 - ICX267AK Drive Timing Chart (Horizontal Sync) Progressive Scan Mode (With high-speed sweep) (Refer to "b" on page 21.) 247020 bits = 138 lines 0/1790 96 0/1790 HD 392 CLK 56 H1 H2 V1 V2A V2B V3 RG 28 28 28 28 28 28 28 28 28 28 28 28 #1 392 392 56 #1470 56 1 1 96 - 26 - ICX267AK ICX267AK Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.) Cover glass 50N Plastic package Compressive strength 50N 1.2Nm Torsional strength b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. - 27 - ICX267AK c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the poweroff mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. d) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength are the same. Structure A Package Chip Metal plate (lead frame) Structure B Cross section of lead frame The cross section of lead frame can be seen on the side of the package for structure A. - 28 - Package Outline Unit: mm 20 pin DIP 6.9 D 2.5 20 11 0 to 9 A 11 20 ~ C 1.7 12.0 0.1 1.7 2.5 B 10.9 12.2 9.0 1.7 ~ 6.0 V H 0.8 12.7 13.8 0.1 0.8 0.5 10.0 2.5 2.9 0.15 B' 1. "A" is the center of the effective image area. 2. The two points "B" of the package are the horizontal reference. The point "B'" of the package is the vertical reference. 3. The bottom "C" of the package, and the top of the cover glass "D" are the height reference. 4. The center of the effective image area relative to "B" and "B'" is (H, V) = (6.9, 6.0) 0.075mm. 5. The rotation angle of the effective image area relative to H and V is 1. 6. The height from the bottom "C" to the effective image area is 1.41 0.10mm. The height from the top of the cover glass "D" to the effective image area is 1.49 0.15mm. 7. The tilt of the effective image area relative to the bottom "C" is less than 50m. The tilt of the effective image area relative to the top "D" of the cover glass is less than 50m. 8. The thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. ICX267AK ~ 2.4 1.27 0.3 M PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL Sony Corporation Plastic GOLD PLATING 42 ALLOY 0.95g AS-B6-04(E) PACKAGE MASS DRAWING NUMBER 3.5 0.3 0.3 0.25 0.5 1 10 1.7 10 1 - 29 - |
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